Tracing and advanced logging has been locked away in expensive tooling for too long, with the result that it’s been poorly adopted and students aren’t trained on it… That needs to change!
TRASOS is a powerful hardware parallel trace and debug tool designed for embedded systems development. It provides users with advanced capabilities to analyze and optimize their applications running on CORTEX-M/R/A microcontrollers and application CPUs.
TRASOS is in competition to proprietary platforms like J-Trace and TRACE32 and aims at providing users with an easy way to live independent from these tools on an Open-Source hardware and software stack. It should be accessible to all kinds of users, including amateur hardware and software engineers, students and tinkerers.
Features
- Low-cost Open-Source Hardware
- Quick interface powered by FPGA
- Fast 1-4 bit parallel tracing for CORTEX-M (ARM ETM v3.5/v4.0)
- CMSIS-DAP v1 & v2 SWD and JTAG debug interface (OpenOCD, PyOCD and BMP, supports multi-core debug)
- JTAG/SWD transfer speeds up to 1.5 MB/sec
- Supports Instruction and Data Tracing, Breakpoints & Watchpoints, Profiling and Event Logging
- Whole stack uses Open-Source tools and libraries
- Programmable power gate
- Option to use external power supply terminals for power monitoring (e.g. using Nordic PPK2)
- Modular design – FPGA decoupled from tracing interface
- Small 6L PCB for FPGA module to keep manufacturing costs down
- Larger 4L PCB for user interface and debug/trace connectors
- Isolated USB2-HS interface with DFU capability
- ECP5 FPGA (LFE5U-25)
- 128Mb of RAM, QSPI flash, 16Kb EEPROM
- Buffered I/O for 1.8V and 3.3V targets
- 5 x isolated GPIO routed to FPGA, could be used for logic analyzer or bus decoding purposes
- Possibility to extend trace/debug features to other platforms, e.g. RISC-V
Previous debugger version
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